FIR Filtering on ARM Cortex-M3

This paper describes how to implement efficient FIR filters on ARM Cortex-M3 microprocessors. Two multiply-accumulate instructions are discussed: MLA – multiply with accumulate, using 32-bit operands and producing a 32-bit result, and SMLAL – signed multiply with accumulate, using 32-bit operands and producing a 64-bit result. There are advantages and disadvantages for each instruction. It is possible, for example, to reuse the data loaded in memory and compute multiple output samples per iteration. MLA is more suitable for this technique than SMLAL. But SMLAL can provide higher accuracy than MLA. This paper gives also an insight on how to increase the filtering accuracy with non-uniform coefficient fractional wordlength. This can be useful if there are very small and very large floating-point constant coefficients. Key-Words: embedded software, fixed-point arithmetic, filtering algorithms, ARM Cortex-M3